Use WRITE_RD/WRITE_FRD macros to write registers

[riscv-isa-sim.git] / riscv / insns / fmv_x_d.h

diff --git a/riscv/insns/fmv_x_d.h b/riscv/insns/fmv_x_d.h
index a067fd9dfce3131c7f29d238265904dc19892335..5bcf2b5909ccf79795e89c7f16a97e980007a40b 100644 (file)
--- a/riscv/insns/fmv_x_d.h
+++ b/riscv/insns/fmv_x_d.h
@@ -1,3 +1,3 @@
 require_xpr64;
 require_fp;
-RD = FRS1;
+WRITE_RD(FRS1);