Use WRITE_RD/WRITE_FRD macros to write registers

[riscv-isa-sim.git] / riscv / insns / fsgnjn_s.h

diff --git a/riscv/insns/fsgnjn_s.h b/riscv/insns/fsgnjn_s.h
index dd66d71a73bb00f23827c4301afeb34b71ae44df..b098150c79ba8fd2776911c08e1c3304608b569c 100644 (file)
--- a/riscv/insns/fsgnjn_s.h
+++ b/riscv/insns/fsgnjn_s.h
@@ -1,2 +1,2 @@
 require_fp;
-FRD = (FRS1 &~ (uint32_t)INT32_MIN) | ((~FRS2) & (uint32_t)INT32_MIN);
+WRITE_FRD((FRS1 &~ (uint32_t)INT32_MIN) | ((~FRS2) & (uint32_t)INT32_MIN));