Use WRITE_RD/WRITE_FRD macros to write registers

[riscv-isa-sim.git] / riscv / insns / fsgnjx_d.h

diff --git a/riscv/insns/fsgnjx_d.h b/riscv/insns/fsgnjx_d.h
index 331b6e4f4c8ac496b52dd16c2cba717d70f19d05..2bcef6f306a84573a5d4e81ea8e69483da89ad2c 100644 (file)
--- a/riscv/insns/fsgnjx_d.h
+++ b/riscv/insns/fsgnjx_d.h
@@ -1,2 +1,2 @@
 require_fp;
-FRD = FRS1 ^ (FRS2 & INT64_MIN);
+WRITE_FRD(FRS1 ^ (FRS2 & INT64_MIN));