Use WRITE_RD/WRITE_FRD macros to write registers

[riscv-isa-sim.git] / riscv / insns / fsgnjx_s.h

diff --git a/riscv/insns/fsgnjx_s.h b/riscv/insns/fsgnjx_s.h
index b4554066e59de99f3c409da64039bdcfa52c35e9..69b2d98c4b0c4c0de47ba7d6377e660b55e55978 100644 (file)
--- a/riscv/insns/fsgnjx_s.h
+++ b/riscv/insns/fsgnjx_s.h
@@ -1,2 +1,2 @@
 require_fp;
-FRD = FRS1 ^ (FRS2 & (uint32_t)INT32_MIN);
+WRITE_FRD(FRS1 ^ (FRS2 & (uint32_t)INT32_MIN));