[xcc] instructions now set PC explicitly
[riscv-isa-sim.git] / riscv / insns / jalr_c.h
index 536ebbf72e180a1db8960eda79957433d9f1055b..91be911b9556c709ff92787ed7f543c9cb8a7eee 100644 (file)
@@ -1,3 +1,3 @@
-reg_t temp = npc;
-npc = RS1 + SIMM;
-RD = temp;
+reg_t temp = RS1;
+RD = npc;
+set_pc(temp + SIMM);