[xcc] minor performance tweaks
[riscv-isa-sim.git] / riscv / insns / jalr_c.h
index 18b2508ec898357e17538366c4bd7baced9fc6d0..91be911b9556c709ff92787ed7f543c9cb8a7eee 100644 (file)
@@ -1,3 +1,3 @@
-uint32_t temp = npc;
-npc = RA;
-RC = temp;
+reg_t temp = RS1;
+RD = npc;
+set_pc(temp + SIMM);