[xcc] minor performance tweaks

[riscv-isa-sim.git] / riscv / insns / jalr_c.h

diff --git a/riscv/insns/jalr_c.h b/riscv/insns/jalr_c.h
index dade874cb807d6de6d11c4158d8de1d12d1da4af..91be911b9556c709ff92787ed7f543c9cb8a7eee 100644 (file)
--- a/riscv/insns/jalr_c.h
+++ b/riscv/insns/jalr_c.h
@@ -1,3 +1,3 @@
-uint32_t temp = npc;
-npc = RS1;
-RDR = temp;
+reg_t temp = RS1;
+RD = npc;
+set_pc(temp + SIMM);