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Use WRITE_RD/WRITE_FRD macros to write registers
[riscv-isa-sim.git]
/
riscv
/
insns
/
lhu.h
diff --git
a/riscv/insns/lhu.h
b/riscv/insns/lhu.h
index 842a7527f65e2ae5dcf898cf234ed834298716e7..9d240702adc5c03077bf48d3ba2f5dd1d7d3161d 100644
(file)
--- a/
riscv/insns/lhu.h
+++ b/
riscv/insns/lhu.h
@@
-1
+1
@@
-
RD = MMU.load_uint16(RS1 + insn.i_imm(
));
+
WRITE_RD(MMU.load_uint16(RS1 + insn.i_imm()
));