Use WRITE_RD/WRITE_FRD macros to write registers

[riscv-isa-sim.git] / riscv / insns / lui.h

diff --git a/riscv/insns/lui.h b/riscv/insns/lui.h
index 8dce543216513ed543c57cd3661046d8973bf83d..c7b5264e0042407f23c9e58154c6356c8538150a 100644 (file)
--- a/riscv/insns/lui.h
+++ b/riscv/insns/lui.h
@@ -1 +1 @@
-RD = insn.u_imm();
+WRITE_RD(insn.u_imm());