[xcc, sim] changed instruction format so imm12 subs for rs2

[riscv-isa-sim.git] / riscv / insns / madd_d.h

diff --git a/riscv/insns/madd_d.h b/riscv/insns/madd_d.h
index e1b92060525a748078af6e4c9d388204e914406e..c9d63186d99a06c8619476e30694f4a91ff77640 100644 (file)
--- a/riscv/insns/madd_d.h
+++ b/riscv/insns/madd_d.h
@@ -1,3 +1,3 @@
 require_fp;
-FRC = f64_mulAdd(FRA, FRB, FRD);
+FRDR = f64_mulAdd(FRS1, FRS2, FRS3);
 set_fp_exceptions;