[xcc, sim] changed instruction format so imm12 subs for rs2

[riscv-isa-sim.git] / riscv / insns / madd_s.h

diff --git a/riscv/insns/madd_s.h b/riscv/insns/madd_s.h
index 3433adfe0d387de17a049ba2f5926153a6c8d9de..49f4861007238de198b36344f49f97c5b1cb9780 100644 (file)
--- a/riscv/insns/madd_s.h
+++ b/riscv/insns/madd_s.h
@@ -1,3 +1,3 @@
 require_fp;
-FRC = f32_mulAdd(FRA, FRB, FRD);
+FRDR = f32_mulAdd(FRS1, FRS2, FRS3);
 set_fp_exceptions;