Use WRITE_RD/WRITE_FRD macros to write registers

[riscv-isa-sim.git] / riscv / insns / mfpcr.h

diff --git a/riscv/insns/mfpcr.h b/riscv/insns/mfpcr.h
index f711931d466794056c1657652053e3fe1a18a8c3..a539115323d14f8478c55fbfa6c05881d1e68b36 100644 (file)
--- a/riscv/insns/mfpcr.h
+++ b/riscv/insns/mfpcr.h
@@ -1,2 +1,2 @@
 require_supervisor;
-RD = p->get_pcr(insn.rs1());
+WRITE_RD(p->get_pcr(insn.rs1()));