[opcodes,pk,sim] add more vector traps (for #banks, illegal instructions)

[riscv-isa-sim.git] / riscv / insns / mfpcr.h

diff --git a/riscv/insns/mfpcr.h b/riscv/insns/mfpcr.h
index fe00f5ffe65d71283ec48c228bf03d8a22fc33d8..c1f629ac2fdff5948f4a4e84adb35f1c8992f1d4 100644 (file)
--- a/riscv/insns/mfpcr.h
+++ b/riscv/insns/mfpcr.h
@@ -34,6 +34,10 @@ switch(insn.rtype.rs2)
     val = mmu.get_ptbr();
     break;
 
+  case 11:
+    val = vecbanks;
+    break;
+
   case 17:
     fromhost = val = sim->get_fromhost();
     break;