reg_t val;
-switch(insn.rtype.rb)
+switch(insn.rtype.rs2)
{
case 0:
val = sr;
val = badvaddr;
break;
case 3:
- val = ebase;
+ val = evec;
break;
case 4:
val = count;
case 5:
val = compare;
break;
+ case 6:
+ val = cause;
+ break;
+ case 7:
+ val = 0;
+ cause &= ~(1 << (IPI_IRQ+CAUSE_IP_SHIFT));
+ break;
case 8:
- val = MEMSIZE >> 12;
+ val = mmu.memsz >> PGSHIFT;
+ break;
+
+ case 9:
+ val = mmu.get_ptbr();
+ break;
+
+ case 10:
+ val = id;
+ break;
+
+ case 11:
+ val = vecbanks;
+ break;
+
+ case 12:
+ val = sim->num_cores();
break;
case 17:
val = -1;
}
-RC = gprlen == 64 ? val : sext32(val);
+RD = sext_xprlen(val);