[sim,pk] added interrupt-pending field to cause reg

[riscv-isa-sim.git] / riscv / insns / mtpcr.h

diff --git a/riscv/insns/mtpcr.h b/riscv/insns/mtpcr.h
index 1a31a32151b08c789b29f29ee567b4836f680295..449f63d22d079b105a6e46c80d8edfec34cd3496 100644 (file)
--- a/riscv/insns/mtpcr.h
+++ b/riscv/insns/mtpcr.h
@@ -15,7 +15,7 @@ switch(insn.rtype.rs2)
     count = RS1;
     break;
   case 5:
-    interrupts_pending &= ~(1 << TIMER_IRQ);
+    cause &= ~(1 << (TIMER_IRQ+CAUSE_IP_SHIFT));
     compare = RS1;
     break;