Merge branch 'master' of /project/eecs/parlab/git/projects/riscv

[riscv-isa-sim.git] / riscv / insns / mtpcr.h

diff --git a/riscv/insns/mtpcr.h b/riscv/insns/mtpcr.h
index 5c7289eb7097f4366240278425ac872247d9a9aa..79e28bf4c5c44a36f6bd7a86abef0c523b844657 100644 (file)
--- a/riscv/insns/mtpcr.h
+++ b/riscv/insns/mtpcr.h
@@ -1,28 +1,33 @@
 require_supervisor;
 
-reg_t val = gprlen == 64 ? RA : sext32(RA);
-
 switch(insn.rtype.rb)
 {
   case 0:
-    set_sr(val);
+    set_sr(RA);
     break;
   case 1:
-    epc = val;
+    epc = RA;
     break;
   case 3:
-    ebase = val & ~0xFFF;
+    ebase = RA & ~0xFFF;
+    break;
+  case 4:
+    count = RA;
+    break;
+  case 5:
+    interrupts_pending &= ~(1 << TIMER_IRQ);
+    compare = RA;
     break;
 
   case 16:
-    tohost = val;
-    sim->set_tohost(tohost);
+    tohost = RA;
+    sim->set_tohost(RA);
     break;
 
   case 24:
-    pcr_k0 = val;
+    pcr_k0 = RA;
     break;
   case 25:
-    pcr_k1 = val;
+    pcr_k1 = RA;
     break;
 }