Support setting ISA/subsets with --isa flag
[riscv-isa-sim.git] / riscv / insns / mulhu.h
index 63344263fe3588a5195eb09fdb5ea075f431d9b1..1ae365080c6c5955f25c406dc2c7e0b76c223770 100644 (file)
@@ -1,4 +1,5 @@
-if(xpr64)
-  RD = (uint128_t(RS1) * uint128_t(RS2)) >> 64;
+require_extension('M');
+if (xlen == 64)
+  WRITE_RD(mulhu(RS1, RS2));
 else
-  RD = sext32(((uint64_t)(uint32_t)RS1 * (uint64_t)(uint32_t)RS2) >> 32);
+  WRITE_RD(sext32(((uint64_t)(uint32_t)RS1 * (uint64_t)(uint32_t)RS2) >> 32));