Support setting ISA/subsets with --isa flag
[riscv-isa-sim.git] / riscv / insns / mulhu.h
index 9f3de3ff630351c141e45e278c2a413af2f7f297..1ae365080c6c5955f25c406dc2c7e0b76c223770 100644 (file)
@@ -1,2 +1,5 @@
-RC = sext32((RA * RB) >> 32);
-
+require_extension('M');
+if (xlen == 64)
+  WRITE_RD(mulhu(RS1, RS2));
+else
+  WRITE_RD(sext32(((uint64_t)(uint32_t)RS1 * (uint64_t)(uint32_t)RS2) >> 32));