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[xcc] minor performance tweaks
[riscv-isa-sim.git]
/
riscv
/
insns
/
mulw.h
diff --git
a/riscv/insns/mulw.h
b/riscv/insns/mulw.h
index c483fb6f87bcc8bbf868dfcaaa0c46d8a58beb72..7b0a934b68e20ee022e7c871e88dfb8210a413a4 100644
(file)
--- a/
riscv/insns/mulw.h
+++ b/
riscv/insns/mulw.h
@@
-1,2
+1,2
@@
-
RDR = sext32(RS1 * RS2)
;
-
+
require_xpr64
;
+RD = sext32(RS1 * RS2);