[xcc, sim] changed instruction format so imm12 subs for rs2

[riscv-isa-sim.git] / riscv / insns / nmadd_d.h

diff --git a/riscv/insns/nmadd_d.h b/riscv/insns/nmadd_d.h
index 73ab2bf044fb2845fd2c6141dfe0ed1cb9e52e02..1cdebd32c1bf11172b42831b43099f00fcb96710 100644 (file)
--- a/riscv/insns/nmadd_d.h
+++ b/riscv/insns/nmadd_d.h
@@ -1,3 +1,3 @@
 require_fp;
-FRC = f64_mulAdd(FRA, FRB, FRD) ^ (uint64_t)INT64_MIN;
+FRDR = f64_mulAdd(FRS1, FRS2, FRS3) ^ (uint64_t)INT64_MIN;
 set_fp_exceptions;