[xcc, sim] changed instruction format so imm12 subs for rs2

[riscv-isa-sim.git] / riscv / insns / nmsub_s.h

diff --git a/riscv/insns/nmsub_s.h b/riscv/insns/nmsub_s.h
index d9fe109511dc5b6d1b7f5eb01058cc20c00c8a3e..9818dc76fe6d326d5988bac4dd0d259db199c8b4 100644 (file)
--- a/riscv/insns/nmsub_s.h
+++ b/riscv/insns/nmsub_s.h
@@ -1,3 +1,3 @@
 require_fp;
-FRC = f32_mulAdd(FRA, FRB, FRD ^ (uint32_t)INT32_MIN) ^ (uint32_t)INT32_MIN;
+FRDR = f32_mulAdd(FRS1, FRS2, FRS3 ^ (uint32_t)INT32_MIN) ^ (uint32_t)INT32_MIN;
 set_fp_exceptions;