[xcc] minor performance tweaks

[riscv-isa-sim.git] / riscv / insns / or.h

diff --git a/riscv/insns/or.h b/riscv/insns/or.h
index d88c9f84e7c2c97856ec83b4f436af12c7d85920..07bcac3555c41da7eacc84775e17b7bb4d5830a7 100644 (file)
--- a/riscv/insns/or.h
+++ b/riscv/insns/or.h
@@ -1 +1 @@
-RC = RA | RB;
+RD = RS1 | RS2;