[xcc] minor performance tweaks

[riscv-isa-sim.git] / riscv / insns / or.h

diff --git a/riscv/insns/or.h b/riscv/insns/or.h
index ef27ba6f25a0c27606ac9fa120200db9d021bc56..07bcac3555c41da7eacc84775e17b7bb4d5830a7 100644 (file)
--- a/riscv/insns/or.h
+++ b/riscv/insns/or.h
@@ -1 +1 @@
-RDR = RS1 | RS2;
+RD = RS1 | RS2;