Support setting ISA/subsets with --isa flag
[riscv-isa-sim.git] / riscv / insns / remw.h
index eb23ef1c4ac90a932f2a1d7aa1153b264fcae1f0..56221ccd4e742dbe142858d0e7739c182c95818a 100644 (file)
@@ -1,4 +1,8 @@
-if(int32_t(RS2) == 0 || (int32_t(RS1) == INT32_MIN && int32_t(RS2) == -1))
-  RD = 0;
+require_extension('M');
+require_rv64;
+sreg_t lhs = sext32(RS1);
+sreg_t rhs = sext32(RS2);
+if(rhs == 0)
+  WRITE_RD(lhs);
 else
-  RD = sext32(int32_t(RS1) % int32_t(RS2));
+  WRITE_RD(sext32(lhs % rhs));