Support setting ISA/subsets with --isa flag
[riscv-isa-sim.git] / riscv / insns / sc_d.h
index a29b9f74f4bc971a08c068638ce0db82d0751067..01a45ce9094af383e151d039863e8de6df42d9e3 100644 (file)
@@ -1,2 +1,9 @@
-require_xpr64;
-RD = mmu.store_conditional_uint64(RS1, RS2);
+require_extension('A');
+require_rv64;
+if (RS1 == p->get_state()->load_reservation)
+{
+  MMU.store_uint64(RS1, RS2);
+  WRITE_RD(0);
+}
+else
+  WRITE_RD(1);