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Support setting ISA/subsets with --isa flag
[riscv-isa-sim.git]
/
riscv
/
insns
/
sc_w.h
diff --git
a/riscv/insns/sc_w.h
b/riscv/insns/sc_w.h
index caf768340215dfe9744bdebc64c7459705201d44..68ec57717aa190ca52e170b4047df859ce69e20d 100644
(file)
--- a/
riscv/insns/sc_w.h
+++ b/
riscv/insns/sc_w.h
@@
-1
+1,8
@@
-RD = mmu.store_conditional_uint32(RS1, RS2);
+require_extension('A');
+if (RS1 == p->get_state()->load_reservation)
+{
+ MMU.store_uint32(RS1, RS2);
+ WRITE_RD(0);
+}
+else
+ WRITE_RD(1);