[xcc, sim] changed instruction format so imm12 subs for rs2

[riscv-isa-sim.git] / riscv / insns / sgnmul_d.h

diff --git a/riscv/insns/sgnmul_d.h b/riscv/insns/sgnmul_d.h
index c30dcea5b9d2fad8e1d557785d0d0d95e93926c1..8e558506c815daf54d24f950af90818b21326d92 100644 (file)
--- a/riscv/insns/sgnmul_d.h
+++ b/riscv/insns/sgnmul_d.h
@@ -1,2 +1,2 @@
 require_fp;
-FRC = FRA ^ (FRB & INT64_MIN);
+FRDR = FRS1 ^ (FRS2 & INT64_MIN);