[xcc] minor performance tweaks

[riscv-isa-sim.git] / riscv / insns / sll.h

diff --git a/riscv/insns/sll.h b/riscv/insns/sll.h
index 59da49de6f92a6abcb1e03f76088fd6351f7207b..86eb96682ca3a1818f29ed18310415a9647fcaf1 100644 (file)
--- a/riscv/insns/sll.h
+++ b/riscv/insns/sll.h
@@ -1,2 +1 @@
-require64;
-RDR = RS2 << (RS1 & 0x3F);
+RD = sext_xprlen(RS1 << (RS2 & (xprlen-1)));