[xcc] minor performance tweaks

[riscv-isa-sim.git] / riscv / insns / sll.h

diff --git a/riscv/insns/sll.h b/riscv/insns/sll.h
index a07e038cbbfee5d84e89474a1ec68506def0e288..86eb96682ca3a1818f29ed18310415a9647fcaf1 100644 (file)
--- a/riscv/insns/sll.h
+++ b/riscv/insns/sll.h
@@ -1,2 +1 @@
-require64;
-RC = RB << SHAMT;
+RD = sext_xprlen(RS1 << (RS2 & (xprlen-1)));