[xcc, sim] changed instruction format so imm12 subs for rs2

[riscv-isa-sim.git] / riscv / insns / slti.h

diff --git a/riscv/insns/slti.h b/riscv/insns/slti.h
index a5ef31ed09d5572306411ae4f89ba375b12b0f9f..6204619a73c5cedf2e44dbbf757f7e3e5f5a2ed8 100644 (file)
--- a/riscv/insns/slti.h
+++ b/riscv/insns/slti.h
@@ -1 +1 @@
-RA = sreg_t(cmp_trunc(RB)) < sreg_t(cmp_trunc(SIMM));
+RDI = sreg_t(cmp_trunc(RS1)) < sreg_t(cmp_trunc(SIMM));