Use WRITE_RD/WRITE_FRD macros to write registers

[riscv-isa-sim.git] / riscv / insns / sltiu.h

diff --git a/riscv/insns/sltiu.h b/riscv/insns/sltiu.h
index 924fc929d32ae7c8ffa0d1f9ab5c7bfea6b0e873..ff4eae1586b7ff5d75029472982389e248e7baba 100644 (file)
--- a/riscv/insns/sltiu.h
+++ b/riscv/insns/sltiu.h
@@ -1 +1 @@
-RD = cmp_trunc(RS1) < cmp_trunc(insn.i_imm());
+WRITE_RD(cmp_trunc(RS1) < cmp_trunc(insn.i_imm()));