Instructions are no longer member functions

[riscv-isa-sim.git] / riscv / insns / srai.h

diff --git a/riscv/insns/srai.h b/riscv/insns/srai.h
index bb17d2767c6533d3be35c6069d802b53af7fb22b..7360d5fcd6cbb50022cfa2bc2c8acab1c705b5cb 100644 (file)
--- a/riscv/insns/srai.h
+++ b/riscv/insns/srai.h
@@ -3,6 +3,6 @@ if(xpr64)
 else
 {
   if(SHAMT & 0x20)
-    throw trap_illegal_instruction;
+    throw trap_illegal_instruction();
   RD = sext32(int32_t(RS1) >> SHAMT);
 }