Use WRITE_RD/WRITE_FRD macros to write registers

[riscv-isa-sim.git] / riscv / insns / sraiw.h

diff --git a/riscv/insns/sraiw.h b/riscv/insns/sraiw.h
index f43b3fb46fa3e5b62ec0fa738f14f770517450de..242c97eb45ee2be48020896017ed0de6821b55ba 100644 (file)
--- a/riscv/insns/sraiw.h
+++ b/riscv/insns/sraiw.h
@@ -1,2 +1,2 @@
 require_xpr64;
-RD = sext32(int32_t(RS1) >> SHAMT);
+WRITE_RD(sext32(int32_t(RS1) >> SHAMT));