Instructions are no longer member functions

[riscv-isa-sim.git] / riscv / insns / srli.h

diff --git a/riscv/insns/srli.h b/riscv/insns/srli.h
index 5378fd1e57118756fbf8574ff5ddeeeb5c7ed8d2..f5b8c0285bef1a9ae524cb52d7d73ed2654f33a4 100644 (file)
--- a/riscv/insns/srli.h
+++ b/riscv/insns/srli.h
@@ -3,6 +3,6 @@ if(xpr64)
 else
 {
   if(SHAMT & 0x20)
-    throw trap_illegal_instruction;
+    throw trap_illegal_instruction();
   RD = sext32((uint32_t)RS1 >> SHAMT);
 }