Use WRITE_RD/WRITE_FRD macros to write registers

[riscv-isa-sim.git] / riscv / insns / srliw.h

diff --git a/riscv/insns/srliw.h b/riscv/insns/srliw.h
index 2ee1be0b57e521cb50c3e53c7e01c2acec73055d..0b6f9b833fcc71c3480cd8106b7b4379727f5c37 100644 (file)
--- a/riscv/insns/srliw.h
+++ b/riscv/insns/srliw.h
@@ -1,2 +1,2 @@
 require_xpr64;
-RD = sext32((uint32_t)RS1 >> SHAMT);
+WRITE_RD(sext32((uint32_t)RS1 >> SHAMT));