[xcc] minor performance tweaks
[riscv-isa-sim.git] / riscv / insns / stop.h
index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..791a82cbcf86f969aae9c0de80aaf0010b80d536 100644 (file)
@@ -0,0 +1,3 @@
+require_vector;
+utmode = false;
+throw vt_command_stop;