[sim] integrated SoftFloat-3 with ISA sim; removed SoftFloat-2b

[riscv-isa-sim.git] / riscv / insns / sub_d.h

diff --git a/riscv/insns/sub_d.h b/riscv/insns/sub_d.h
index 55d0e86212a4c196e5edc6f9874ad906d4d1891e..023a1f324f2770080345f0d81bf4fd3a0922efa6 100644 (file)
--- a/riscv/insns/sub_d.h
+++ b/riscv/insns/sub_d.h
@@ -1,3 +1,3 @@
 require_fp;
-FRC = float64_sub(FRA, FRB);
+FRC = f64_sub(FRA, FRB);
 set_fp_exceptions;