[sim] integrated SoftFloat-3 with ISA sim; removed SoftFloat-2b

[riscv-isa-sim.git] / riscv / insns / sub_s.h

diff --git a/riscv/insns/sub_s.h b/riscv/insns/sub_s.h
index 4a359bfc5a428f4a152fec47a1a110b59a22f09e..fd83da031b63a2f38862cbde04de2a598b61fd62 100644 (file)
--- a/riscv/insns/sub_s.h
+++ b/riscv/insns/sub_s.h
@@ -1,3 +1,3 @@
 require_fp;
-FRC = float32_sub(FRA, FRB);
+FRC = f32_sub(FRA, FRB);
 set_fp_exceptions;