spec bump

[riscv-isa-sim.git] / riscv / jtag_dtm.cc

diff --git a/riscv/jtag_dtm.cc b/riscv/jtag_dtm.cc
index bcc3720e6d576460b1e33ce660cd7a067d731196..cd3f3ee996a94a12ac9861d320ce62b43ff7338d 100644 (file)
--- a/riscv/jtag_dtm.cc
+++ b/riscv/jtag_dtm.cc
@@ -40,7 +40,7 @@ enum {
 jtag_dtm_t::jtag_dtm_t(debug_module_t *dm) :
   dm(dm),
   _tck(false), _tms(false), _tdi(false), _tdo(false),
-  dtmcontrol((abits << DTM_DTMCONTROL_ABITS_OFFSET) | 1),
+  dtmcontrol((abits << DTM_DTMCS_ABITS_OFFSET) | 1),
   dmi(DMI_OP_STATUS_FAILED << DTM_DMI_OP_OFFSET),
   _state(TEST_LOGIC_RESET)
 {