Merge pull request #117 from riscv/multicore_debug

[riscv-isa-sim.git] / riscv / memtracer.h

diff --git a/riscv/memtracer.h b/riscv/memtracer.h
index e223c43c71ce6473268d8b7e467d48f439625ec6..6952e2f870b22db2f6d7e47ecf0ff73751e1a70f 100644 (file)
--- a/riscv/memtracer.h
+++ b/riscv/memtracer.h
@@ -3,35 +3,41 @@
 #ifndef _MEMTRACER_H
 #define _MEMTRACER_H
 
-#include <stdint.h>
+#include <cstdint>
 #include <string.h>
 #include <vector>
 
+enum access_type {
+  LOAD,
+  STORE,
+  FETCH,
+};
+
 class memtracer_t
 {
  public:
   memtracer_t() {}
   virtual ~memtracer_t() {}
 
-  virtual bool interested_in_range(uint64_t begin, uint64_t end, bool store, bool fetch) = 0;
-  virtual void trace(uint64_t addr, size_t bytes, bool store, bool fetch) = 0;
+  virtual bool interested_in_range(uint64_t begin, uint64_t end, access_type type) = 0;
+  virtual void trace(uint64_t addr, size_t bytes, access_type type) = 0;
 };
 
 class memtracer_list_t : public memtracer_t
 {
  public:
   bool empty() { return list.empty(); }
-  bool interested_in_range(uint64_t begin, uint64_t end, bool store, bool fetch)
+  bool interested_in_range(uint64_t begin, uint64_t end, access_type type)
   {
     for (std::vector<memtracer_t*>::iterator it = list.begin(); it != list.end(); ++it)
-      if ((*it)->interested_in_range(begin, end, store, fetch))
+      if ((*it)->interested_in_range(begin, end, type))
         return true;
     return false;
   }
-  void trace(uint64_t addr, size_t bytes, bool store, bool fetch)
+  void trace(uint64_t addr, size_t bytes, access_type type)
   {
     for (std::vector<memtracer_t*>::iterator it = list.begin(); it != list.end(); ++it)
-      (*it)->trace(addr, bytes, store, fetch);
+      (*it)->trace(addr, bytes, type);
   }
   void hook(memtracer_t* h)
   {