[xcc,pk,sim,opcodes] added first RVC instruction

[riscv-isa-sim.git] / riscv / mmu.h

diff --git a/riscv/mmu.h b/riscv/mmu.h
index 1b8a422e20a45e5f787839b517062e99c0bb843c..5d516bc59981d7c6584febf0924b93a626e3b949 100644 (file)
--- a/riscv/mmu.h
+++ b/riscv/mmu.h
@@ -18,10 +18,15 @@ public:
       *(type##_t*)(mem+addr) = val; \
     }
 
-  insn_t load_insn(reg_t addr)
+  insn_t load_insn(reg_t addr, bool rvc)
   {
-    check_align_and_bounds(addr, sizeof(insn_t), false, true);
-    return *(insn_t*)(mem+addr);
+    check_align_and_bounds(addr, rvc ? 2 : 4, false, true);
+    uint16_t lo = *(uint16_t*)(mem+addr);
+    uint16_t hi = *(uint16_t*)(mem+addr+2);
+
+    insn_t insn; 
+    insn.bits = ((uint32_t)hi << 16) | lo;
+    return insn;
   }
 
   load_func(uint8)