max_isa = state.misa;
}
-void state_t::reset()
+void state_t::reset(reg_t max_isa)
{
memset(this, 0, sizeof(*this));
+ misa = max_isa;
prv = PRV_M;
pc = DEFAULT_RSTVEC;
load_reservation = -1;
void processor_t::reset()
{
- state.reset();
+ state.reset(max_isa);
state.dcsr.halt = halt_on_reset;
halt_on_reset = false;
set_csr(CSR_MSTATUS, state.mstatus);