Disassemble RVC instructions based on XLEN

[riscv-isa-sim.git] / riscv / processor.h

diff --git a/riscv/processor.h b/riscv/processor.h
index 31d5f6ca7dd442ef3005e04a4832823bdfbbcf77..090ebe7a155a9157f2cc6c8e0d112d05f120acfc 100644 (file)
--- a/riscv/processor.h
+++ b/riscv/processor.h
@@ -121,6 +121,7 @@ public:
   void set_privilege(reg_t);
   void yield_load_reservation() { state.load_reservation = (reg_t)-1; }
   void update_histogram(reg_t pc);
+  const disassembler_t* get_disassembler() { return disassembler; }
 
   void register_insn(insn_desc_t);
   void register_extension(extension_t*);