Remove MTIME[CMP]; add RTC device

[riscv-isa-sim.git] / riscv / riscv.mk.in

diff --git a/riscv/riscv.mk.in b/riscv/riscv.mk.in
index 239beb962b7dbeb7898a102bace1a631732db317..8ffff82f9650f34f640f716614a1ae1031f9966e 100644 (file)
--- a/riscv/riscv.mk.in
+++ b/riscv/riscv.mk.in
@@ -40,6 +40,9 @@ riscv_srcs = \
        extensions.cc \
        rocc.cc \
        regnames.cc \
+       devices.cc \
+       rom.cc \
+       rtc.cc \
        $(riscv_gen_srcs) \
 
 riscv_test_srcs =
@@ -107,10 +110,8 @@ riscv_insn_list = \
        c_lwsp \
        c_mv \
        c_or \
-       c_sll \
        c_slli \
        c_srai \
-       c_srl \
        c_srli \
        c_sub \
        c_subw \
@@ -127,6 +128,8 @@ riscv_insn_list = \
        divu \
        divuw \
        divw \
+       ebreak \
+       ecall \
        fadd_d \
        fadd_s \
        fclass_d \
@@ -191,7 +194,6 @@ riscv_insn_list = \
        fsub_d \
        fsub_s \
        fsw \
-       hrts \
        jal \
        jalr \
        lb \
@@ -204,8 +206,7 @@ riscv_insn_list = \
        lui \
        lw \
        lwu \
-       mrth \
-       mrts \
+       mret \
        mul \
        mulh \
        mulhsu \
@@ -218,8 +219,6 @@ riscv_insn_list = \
        remuw \
        remw \
        sb \
-       sbreak \
-       scall \
        sc_d \
        sc_w \
        sd \