Listen on a socket for gdb to connect to.

[riscv-isa-sim.git] / riscv / riscv.mk.in

diff --git a/riscv/riscv.mk.in b/riscv/riscv.mk.in
index 882f34db7163643e98c41adff43da11aafbe6a21..c7d84f794559b48dc7ab76c5b2a93b909f3966b4 100644 (file)
--- a/riscv/riscv.mk.in
+++ b/riscv/riscv.mk.in
@@ -10,6 +10,7 @@ riscv_hdrs = \
        htif.h \
        common.h \
        decode.h \
+       devices.h \
        disasm.h \
        mmu.h \
        processor.h \
@@ -18,10 +19,12 @@ riscv_hdrs = \
        encoding.h \
        cachesim.h \
        memtracer.h \
+       tracer.h \
        extension.h \
        rocc.h \
        insn_template.h \
        mulhi.h \
+       gdbserver.h \
 
 riscv_precompiled_hdrs = \
        insn_template.h \
@@ -40,6 +43,10 @@ riscv_srcs = \
        extensions.cc \
        rocc.cc \
        regnames.cc \
+       devices.cc \
+       rom.cc \
+       rtc.cc \
+       gdbserver.cc \
        $(riscv_gen_srcs) \
 
 riscv_test_srcs =
@@ -81,7 +88,6 @@ riscv_insn_list = \
        bltu \
        bne \
        c_add \
-       c_addi16sp \
        c_addi4spn \
        c_addi \
        c_addw \
@@ -104,15 +110,12 @@ riscv_insn_list = \
        c_jr \
        c_li \
        c_lui \
-       c_lbu \
        c_lw \
        c_lwsp \
        c_mv \
        c_or \
-       c_sll \
        c_slli \
        c_srai \
-       c_srl \
        c_srli \
        c_sub \
        c_subw \
@@ -129,6 +132,8 @@ riscv_insn_list = \
        divu \
        divuw \
        divw \
+       ebreak \
+       ecall \
        fadd_d \
        fadd_s \
        fclass_d \
@@ -193,7 +198,6 @@ riscv_insn_list = \
        fsub_d \
        fsub_s \
        fsw \
-       hrts \
        jal \
        jalr \
        lb \
@@ -206,8 +210,7 @@ riscv_insn_list = \
        lui \
        lw \
        lwu \
-       mrth \
-       mrts \
+       mret \
        mul \
        mulh \
        mulhsu \
@@ -220,8 +223,6 @@ riscv_insn_list = \
        remuw \
        remw \
        sb \
-       sbreak \
-       scall \
        sc_d \
        sc_w \
        sd \