Support setting ISA/subsets with --isa flag

[riscv-isa-sim.git] / riscv / riscv.mk.in

diff --git a/riscv/riscv.mk.in b/riscv/riscv.mk.in
index 1abbc46ae07c557a27f7bf3544e0e1b82ee96922..d30725935583f929c8a0017b3dfecf7feb4f3e5b 100644 (file)
--- a/riscv/riscv.mk.in
+++ b/riscv/riscv.mk.in
@@ -1,7 +1,11 @@
+get_insn_list = $(shell grep ^DECLARE_INSN $(1) | sed 's/DECLARE_INSN(\(.*\),.*,.*)/\1/')
+get_opcode = $(shell grep ^DECLARE_INSN.*\\\<$(2)\\\> $(1) | sed 's/DECLARE_INSN(.*,\(.*\),.*)/\1/')
+
 riscv_subproject_deps = \
-       softfloat_riscv \
        softfloat \
 
+riscv_install_prog_srcs = \
+
 riscv_hdrs = \
        htif.h \
        common.h \
@@ -10,29 +14,16 @@ riscv_hdrs = \
        processor.h \
        sim.h \
        trap.h \
-       opcodes.h \
-       insn_header.h \
-       dispatch.h \
-
-NDISPATCH := 10
-DISPATCH_SRCS := \
-       dispatch0.cc \
-       dispatch1.cc \
-       dispatch2.cc \
-       dispatch3.cc \
-       dispatch4.cc \
-       dispatch5.cc \
-       dispatch6.cc \
-       dispatch7.cc \
-       dispatch8.cc \
-       dispatch9.cc \
-       dispatch10.cc \
-
-$(DISPATCH_SRCS): %.cc: dispatch $(wildcard insns/*.h) $(riscv_hdrs)
-       $< $(subst dispatch,,$(subst .cc,,$@)) $(NDISPATCH) 1024 < $(src_dir)/riscv/opcodes.h > $@
-
-$(src_dir)/riscv/dispatch.h: %.h: dispatch
-       $< $(NDISPATCH) 1024 < $(src_dir)/riscv/opcodes.h > $@
+       encoding.h \
+       cachesim.h \
+       memtracer.h \
+       extension.h \
+       rocc.h \
+       insn_template.h \
+       mulhi.h \
+
+riscv_precompiled_hdrs = \
+       insn_template.h \
 
 riscv_srcs = \
        htif.cc \
@@ -40,12 +31,31 @@ riscv_srcs = \
        sim.cc \
        interactive.cc \
        trap.cc \
-       icsim.cc \
+       cachesim.cc \
        mmu.cc \
        disasm.cc \
-       $(DISPATCH_SRCS) \
+       extension.cc \
+       extensions.cc \
+       rocc.cc \
+       regnames.cc \
+       $(riscv_gen_srcs) \
 
 riscv_test_srcs =
 
-riscv_install_prog_srcs = \
-       riscv-isa-run.cc \
+riscv_gen_hdrs = \
+       icache.h \
+
+riscv_gen_srcs = \
+       $(addsuffix .cc, $(call get_insn_list,$(src_dir)/riscv/encoding.h))
+
+icache_entries := `grep "ICACHE_ENTRIES =" $(src_dir)/riscv/mmu.h | sed 's/.* = \(.*\);/\1/'`
+
+icache.h: mmu.h
+       $(src_dir)/riscv/gen_icache $(icache_entries) > $@.tmp
+       mv $@.tmp $@
+
+$(riscv_gen_srcs): %.cc: insns/%.h insn_template.cc
+       sed 's/NAME/$(subst .cc,,$@)/' $(src_dir)/riscv/insn_template.cc | sed 's/OPCODE/$(call get_opcode,$(src_dir)/riscv/encoding.h,$(subst .cc,,$@))/' > $@
+
+riscv_junk = \
+       $(riscv_gen_srcs) \