Merge pull request #117 from riscv/multicore_debug
[riscv-isa-sim.git] / riscv / rocc.cc
index 7988c011e20ce9d1b1b27f0b53ba0c9d2bf2e972..db03e37c4869e39f5a96808706dac09a3e25b266 100644 (file)
@@ -1,3 +1,5 @@
+// See LICENSE for license details.
+
 #include "rocc.h"
 #include "trap.h"
 #include <cstdlib>