refactor disassembler, and add hwacha disassembler

[riscv-isa-sim.git] / riscv / rocc.h

diff --git a/riscv/rocc.h b/riscv/rocc.h
index e4148ec1509b7706d37db140a3d44797ae6d1c00..63d074d41c084ef58402152a926656e38121815f 100644 (file)
--- a/riscv/rocc.h
+++ b/riscv/rocc.h
@@ -29,6 +29,7 @@ class rocc_t : public extension_t
   virtual reg_t custom2(rocc_insn_t insn, reg_t xs1, reg_t xs2);
   virtual reg_t custom3(rocc_insn_t insn, reg_t xs1, reg_t xs2);
   std::vector<insn_desc_t> get_instructions();
+  std::vector<disasm_insn_t*> get_disasms();
 };
 
 #endif