Add --disable-dtb option to suppress writing the DTB to memory

[riscv-isa-sim.git] / riscv / sim.cc

diff --git a/riscv/sim.cc b/riscv/sim.cc
index c9bbac0e028da5a2965e0e7bf8243771b750a96c..44223a7d90b59772faffe36af4967ffbf2b27f3e 100644 (file)
--- a/riscv/sim.cc
+++ b/riscv/sim.cc
@@ -31,7 +31,7 @@ sim_t::sim_t(const char* isa, size_t nprocs, bool halted, reg_t start_pc,
              unsigned max_bus_master_bits, bool require_authentication)
   : htif_t(args), mems(mems), procs(std::max(nprocs, size_t(1))),
     start_pc(start_pc), current_step(0), current_proc(0), debug(false),
-    remote_bitbang(NULL),
+    histogram_enabled(false), dtb_enabled(true), remote_bitbang(NULL),
     debug_module(this, progsize, max_bus_master_bits, require_authentication)
 {
   signal(SIGINT, &handle_signal);
@@ -109,7 +109,7 @@ void sim_t::step(size_t n)
     if (current_step == INTERLEAVE)
     {
       current_step = 0;
-      procs[current_proc]->yield_load_reservation();
+      procs[current_proc]->get_mmu()->yield_load_reservation();
       if (++current_proc == procs.size()) {
         current_proc = 0;
         clint->increment(INTERLEAVE / INSNS_PER_RTC_TICK);
@@ -202,7 +202,8 @@ char* sim_t::addr_to_mem(reg_t addr) {
 
 void sim_t::reset()
 {
-  make_dtb();
+  if (dtb_enabled)
+    make_dtb();
 }
 
 void sim_t::idle()