Support 64-bit start PCs in reset vector.

[riscv-isa-sim.git] / riscv / sim.cc

diff --git a/riscv/sim.cc b/riscv/sim.cc
index edf0819369cc084fd63730fe373594cd28b96e5a..647cc46fa2a2b44bf64489f230eed03219b13851 100644 (file)
--- a/riscv/sim.cc
+++ b/riscv/sim.cc
@@ -2,7 +2,7 @@
 
 #include "sim.h"
 #include "mmu.h"
-#include "gdbserver.h"
+#include "remote_bitbang.h"
 #include <map>
 #include <iostream>
 #include <sstream>
@@ -26,16 +26,16 @@ static void handle_signal(int sig)
 sim_t::sim_t(const char* isa, size_t nprocs, bool halted, reg_t start_pc,
              std::vector<std::pair<reg_t, mem_t*>> mems,
              const std::vector<std::string>& args)
-  : htif_t(args), mems(mems), procs(std::max(nprocs, size_t(1))),
+  : htif_t(args), debug_module(this), mems(mems), procs(std::max(nprocs, size_t(1))),
     start_pc(start_pc),
-    current_step(0), current_proc(0), debug(false), gdbserver(NULL)
+    current_step(0), current_proc(0), debug(false), remote_bitbang(NULL)
 {
   signal(SIGINT, &handle_signal);
 
   for (auto& x : mems)
     bus.add_device(x.first, x.second);
 
-  bus.add_device(DEBUG_START, &debug_module);
+  debug_module.add_device(&bus);
 
   debug_mmu = new mmu_t(this, NULL);
 
@@ -70,8 +70,8 @@ void sim_t::main()
       interactive();
     else
       step(INTERLEAVE);
-    if (gdbserver) {
-      gdbserver->handle();
+    if (remote_bitbang) {
+      remote_bitbang->tick();
     }
   }
 }
@@ -229,20 +229,18 @@ void sim_t::make_dtb()
   const int reset_vec_size = 8;
 
   start_pc = start_pc == reg_t(-1) ? get_entry_point() : start_pc;
-  reg_t pc_delta = start_pc - DEFAULT_RSTVEC;
-  reg_t pc_delta_hi = (pc_delta + 0x800U) & ~reg_t(0xfffU);
-  reg_t pc_delta_lo = pc_delta - pc_delta_hi;
-  if ((pc_delta_hi >> 31) != 0 && (pc_delta_hi >> 31) != reg_t(-1) >> 31) {
-    fprintf(stderr, "initial pc %" PRIx64 " out of range\n", pc_delta);
-    abort();
-  }
 
   uint32_t reset_vec[reset_vec_size] = {
-    0x297 + uint32_t(pc_delta_hi),              // auipc t0, &pc
-    0x597,                                      // auipc a1, &dtb
-    0x58593 + ((reset_vec_size - 1) * 4 << 20), // addi a1, a1, &dtb
-    0xf1402573,                                 // csrr a0, mhartid
-    0x28067 + uint32_t(pc_delta_lo << 20)       // jalr zero, t0, &pc
+    0x297,                                      // auipc  t0,0x0
+    0x28593 + (reset_vec_size * 4 << 20),       // addi   a1, t0, &dtb
+    0xf1402573,                                 // csrr   a0, mhartid
+    get_core(0)->xlen == 32 ?
+      0x0182a283u :                             // lw     t0,24(t0)
+      0x0182b283u,                              // ld     t0,24(t0)
+    0x28067,                                    // jr     t0
+    0,
+    (uint32_t) (start_pc & 0xffffffff),
+    (uint32_t) (start_pc >> 32)
   };
 
   std::vector<char> rom((char*)reset_vec, (char*)reset_vec + sizeof(reset_vec));